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SEASON 00 / PRACTICECHALLENGE 01 OF 2010 ENGINEERING TRACKSLIVE
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Calculate the setup margin

STA / EasyServer-graded single answer

A single-cycle path has the values below. Ignore jitter and uncertainty. What setup slack remains?

Clock = 1.00 ns
Tcq = 0.08 ns
Comb = 0.72 ns
Setup = 0.06 ns
Skew = 0.00 ns
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01 / SELECT A MATCH

Twenty challenges.
Every answer explained.

현재 시즌은 연습 모드입니다. 실제 사용자가 충분해지기 전에는 가짜 순위·참가자·성과 배지를 표시하지 않습니다.

MATCH 01Easy

Calculate the setup margin

A single-cycle path has the values below. Ignore jitter and uncertainty. What setup slack remains?

STA ↗
MATCH 02Easy

Place the responsibility

Which UVM component normally converts sequence items into pin-level DUT activity?

DV ↗
MATCH 03Medium

Diagnose a congested channel

Two large macros leave a narrow channel carrying many crossing nets. Which first action best tests the root cause?

Physical Design ↗
MATCH 04Easy

Find the first-order pole

A 10 kΩ resistor and 2 pF capacitor form a first-order low-pass. What is the approximate pole frequency?

Analog ↗
MATCH 05Easy

Order the UCIe releases

Which ordering is consistent with the consortium's listed releases?

Architecture ↗
MATCH 06Easy

Identify the CXL protocol name

Which listed name is one of the public CXL 3.0 protocol labels?

Architecture ↗
MATCH 07Easy

Calculate an ideal unit interval

Ignoring signaling details, what is the ideal UI for a 20 Gb/s line rate?

Interface ↗
MATCH 08Easy

Calculate payload efficiency

A transaction has 128 B payload and 32 B declared overhead. What is payload efficiency?

Interface ↗
MATCH 09Easy

Calculate raw memory capacity

A memory has 1024 addressable 32-bit words. What raw capacity results?

Memory ↗
MATCH 10Easy

Calculate ideal pipeline latency

A four-stage pipeline has a 0.5 ns clock period and no stalls. What ideal latency is implied?

Digital ↗
MATCH 11Medium

Evaluate simplified hold slack

Using the displayed convention, what hold slack results?

STA ↗
MATCH 12Easy

Calculate a simple cycle budget

What remaining budget follows from the stated model?

STA ↗
MATCH 13Medium

Calculate ideal dynamic power

With α=0.25, C=2 pF, V=1 V and f=100 MHz, what ideal switching power is estimated?

Power ↗
MATCH 14Easy

Calculate steady-state temperature rise

For 2 W and θJA = 15 °C/W, what first-order temperature rise is estimated?

Packaging ↗
MATCH 15Easy

Calculate ideal ADC LSB

An ideal 10-bit converter spans 1 V. What ideal LSB results?

Analog ↗
MATCH 16Medium

Calculate a simple wire resistance

For ρ=2e−8 Ω·m, L=100 µm and A=1 µm², what resistance is estimated?

Physical Design ↗
MATCH 17Easy

Split current across ideal parallel vias

Under the equal-sharing assumption, 24 mA through 6 identical vias gives what current per via?

Physical Design ↗
MATCH 18Easy

Identify the UVM driver role

Which UVM component conventionally translates sequence items into interface-level activity?

DV ↗
MATCH 19Easy

Choose the reproducibility record

Which extra detail is most necessary to make an open-PDK implementation result reproducible?

Physical Design ↗
MATCH 20Easy

Identify an OpenROAD-safe claim

Which statement stays within documented OpenROAD project scope?

Physical Design ↗
02 / TRACK BOARD

Choose your lane.

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03 / YOUR TRAIL

No invented rank.
Only your attempts.

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